Well, I hope nobody chooses a fab based on the headline number on their marketing material. Adapting your design to them is a long process that requires all kinds of details, and how well they will produce your circuit depends on those details as much as on the feature size.

There’s not really a standard, some feature is probably 3nm, which feature chosen has varied over time and between companies.

There are no features with lengths of 3 nm, 7 nm etc.

Some vertical distances, e.g. thicknesses, are indeed of only a few nm, but the process size name always referred strictly to horizontal distances (i.e. parallel with the wafer surface), which are determined by lithography. Those are at least 10 times larger, in the range 25 nm to 60 nm for modern processes.

There are a few horizontal distances that are not determined by lithography, i.e. they do not correspond with something drawn on the mask, but the distances are determined by speeds of corrosion or diffusion, like also for the vertical dimensions, but those also do not count for naming processes, because you could have such a distance of only e.g. 5 nm even in an 180 nm process. Those distances that are not determined by lithography do not influence the potential density of a circuit but only certain electrical performances.

Everyone is making excuses, but the simple answer is: yes, it’s misleading and deceptive.

It’s allowed, as many, many, many other bad things in this world are.

It's not supposed to be deceptive because the idea is that, say, the 3LPE process provides the same performance as an ideal classic 3 nm transistor.

The naming of the process does not provide any direct information about the performance of the transistors.

The process name is supposed to mean that if the size name is twice smaller than in the same area you can pack 4 times more transistors.

So the 3LPE process is supposed to have a transistor density about one hundred times larger than the 32-nm processes that were used for Intel Sandy Bridge or AMD Bulldozer, or about 3600 times larger than the 180-nm process used for the first Pentium 4.

The performance of individual transistors is usually worse for smaller transistors (except for the energy consumed by switching a single transistor, which is obviously smaller), but that is compensated by using more complex circuits, with more transistors, but not much more, so there is still a gain in density by going to smaller transistors.

3 nm is not the size of these transistors, just like X nm has never been the size of transistors for any value of X, so it's not "misleading and deceptive".